Digital Design Jobs in Hyderabad at Confidential

Last Updated: May 20, 2021 05:10 IST

JOB DETAILS

Company Name
Confidential
Job title
Digital Design
Education
Location
Experience
1-6 Years
Salary
Not Mentioned

Job Profile

The design off ASIC blocks to be used within the next generation Microchip SOC FPGA devices. These ASIC blocks will contain RiscV CPUs and all the associated functions to create true SOC functionality. Will be involved in multi-protocol Serdes and PCS architecture. It is expected that the successful candidate will be able to simulate and debug third-party IP blocks and develop new RTL blocks required for the SOC and be involved from architecture through to production release. The candidate must be familiar with Verilog coding for Synthesis. The candidate will also work on STA at block level and full chip level.



Skills:

Verilog/ System Verilog

AMBA Bus Structures

ASIC Implementation flows including Synthesis and Timing analysis

Familiarity with of at least two of

o RiscV or ARM CPUs

o AMBA / AXI Bus Interconnect

o Ethernet

o USB

o SD/eMMC

o PCIe

o DDR/LPDDR

o Flash/eNVM

REQUIREMENTS

Apply to More than 1000+ new jobs in your city

OTHER DETAILS

Key skills
Digital Design, Rtl Design
Industry
Semiconductor
Summary
The design off ASIC blocks to be used within the next generation Microchip SOC FPGA devices
Last Date
2021-07-17

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