GLS Verification Engineer 3 yrs Jobs in Bangalore at Angel And Genie

Last Updated: Aug 18, 2021 05:10 IST


Company Name
Angel And Genie
Job title
GLS Verification Engineer 3 yrs
3-8 Years
Not Mentioned

Job Profile

Job Description

Job Description: DV engineer with good expertise in SV/UVM concepts.
  • Understanding of DDR protocols preferred.
  • Good debugging and communication skills.
  • Release Comments: Please share profiles with some domain experience in LPDDR4, LPDDR5 kind of technologies
  • Design verification of next generation QDSP cores, candidate should be skilled SV/UVM, CPU micro-architecture, AXI/similar bus protocols, hands on experience with testbench development, debug and regression management.
  • Responsible for building and maintaining GLS testbench (SV/UVM).
  • Responsible for generating constrained random tests for the DSP core and verify the Core netlists with and without timing.
  • Responsible for verifying Power aware correctness in the netlist through PAGLS.
  • Implement and deploy new verification methodologies, automation to continuously improve quality and efficiency .

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Key skills
Design Verification
IT/ Computers - Software
Understanding of DDR protocols preferred.
Last Date

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