Digital Design Verification Engineer, Staff Jobs in Mumbai at Synopsys India Private Limited

Last Updated: Sep 11, 2021 05:10 IST

JOB DETAILS

Company Name
Synopsys India Private Limited
Job title
Digital Design Verification Engineer, Staff
Role
Education
Location
Experience
6-9 Years
Salary
Not Mentioned

Job Profile



We're looking for a highly motivated and innovative candidate to join our team.
Does this sound like a good role for you?

The Digital Design Verification Engineer works on PHY IP verification related to complex protocols. The position offers excellent learning and growth opportunities. This is a technical individual contributor role offering a challenging career path.

The role involves developing and working on verification of high speed PHYs and Serdes in the 50G/100G SERDES space. Additionally, you will be involved in:
  • Verification plan development and its review
  • Verification environment development using internal or 3rd party VIP for the protocol of interest
  • Manage and drive technical outcomes on below.
  • Working hands-on on one or more of below activities.
  • Knowledge of protocols like 25G/50G/100G Ethernet, PON, other networking protocols
  • Hands on experience in creating detailed Verification Environment from Functional Specifications
  • Test planning, Coverage and Assertion planning
  • Hands on experience with System Verilog, mythologies like UVM, simulation and debug tools.
  • Experience with Version Control tools like Perforce/SVN.
  • Knowledge of Perl/Shell scripts.
  • Good communication skills, be a team player with good problem solving and interpersonal skills.

Key Qualification:
  • BE/BTech +6 years of relevant experience / MTech +5 years of relevant experience in Electrical Engineering or other relevant field of study.


Preferred Experience
  • Debug of simulations, including those of real signals modeled using SV for analog
  • RTL, GLS & Co-simulations & coverage closure
  • Deliver high quality RTL and other simulation models to customer
  • Participate in technical reviews and contribute closely
  • Participate in customer support with bring-up of IP in customer simulation environment
  • Participate in review of SERDES / PHY / Controller IP specification to validate compliance to protocol of interest
  • Follow and improve development process ensuring high quality output.

Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the world's broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're poweringit all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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OTHER DETAILS

Key skills
Staff
Industry
Other
Summary
We're looking for a highly motivated and innovative candidate to join our team. Does this sound like a good role for you? The Digital Design Verification Engineer works on PHY IP verification related to complex protocols. The position offers excelle
Last Date
2021-10-19

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